Integrated circuit device connection process

Details Integrated circuit device connection process Integrated circuit device connection process

1981-07-27

1983-07-12

Ozaki, G.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29591, H01L 2128

Patent

active

043922988

ABSTRACT:
A method for forming electrical interconnections in an integrated circuit which involves forming an insulating layer on the silicon chip on the lower of two conductive layers to be interconnected, opening a window in the insulating layer, filling the window with a metallic plug by a lift-off technique, and then forming an interconnection pattern extending over the layer and contacting the plug.

REFERENCES:
patent: 3838442 (1974-09-01), Humphreys
patent: 3945347 (1976-03-01), Takemoto et al.
patent: 3974517 (1976-08-01), Sanders et al.
patent: 4046607 (1977-09-01), Inoue et al.
patent: 4174562 (1979-11-01), Sanders et al.
patent: 4211834 (1980-07-01), Lapadula
patent: 4238559 (1980-12-01), Feng et al.
patent: 4324038 (1982-04-01), Chang et al.
Harada et al., Proceedings of the 6th Conference on Solid State Devices, Tokyo, Japan, 1974, pp. 297-302.

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