Integrated circuit device and method for forming the same

Details Integrated circuit device and method for forming the same Integrated circuit device and method for forming the same

2010-05-03

2011-11-22

Cao, Phat (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular power supply distribution means

C257S208000, C257SE23145

Reexamination Certificate

active

08063417

ABSTRACT:
In an integrated circuit device, element power supply lines connected to a circuit containing a plurality of cells, element ground lines connected thereto, a trunk power supply line connected to each of the element power supply lines, and a trunk ground line connected to each of the element ground lines are provided in a first wiring layer. A branch power supply line connected to the trunk power supply line and a branch ground line connected to the trunk ground line are provided in an upper wiring layer located above the first wiring layer. A wiring structure is determined based on a wiring structure equation expressing the relations among a voltage drop in the lines, the area occupied thereby, and a current consumed thereby and on a circuit characteristic equation expressing, when the circuit is subdivided while the ratio between the area of the circuit and a current consumed thereby is held constant, the relation between an area occupied by a circuit resulting from subdivision and a current consumed thereby.

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Japanese Notice of Reasons for Rejection, w/ English translation thereof, issued in Japanese Patent Application No. JP 2001-060090 dated Sep. 7, 2010.

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