Static information storage and retrieval – Interconnection arrangements
Reexamination Certificate
2005-11-10
2008-08-12
Nguyen, Viet Q. (Department: 2827)
Static information storage and retrieval
Interconnection arrangements
C365S230030, C365S189080, C365S230060
Reexamination Certificate
active
07411804
ABSTRACT:
An integrated circuit device, including first to Nth circuit blocks CB1to CBN disposed along a first direction D1, when the first direction D1is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1to CBN include at least one memory block MB which stores image data, and at least one data driver block DB which drives data lines; and the memory block MB includes a memory cell array, a row address decoder RD, and a sense amplifier block SAB. The row address decoder RD is disposed so that a longitudinal direction of the row address decoder RD coincides with the direction D1, and the sense amplifier block SAB is disposed so that a longitudinal direction of the sense amplifier block SAB coincides with the direction D2.
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Fujise Takashi
Ishiyama Hisanobu
Ito Satoru
Karasawa Junichi
Kodaira Satoru
Nguyen Viet Q.
Oliff & Berridg,e PLC
Seiko Epson Corporation
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