Integrated circuit device and electronic instrument

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

Reexamination Certificate

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C361S091100, C361S111000

Reexamination Certificate

active

07974051

ABSTRACT:
An interface circuit is provided between a first circuit block and a second circuit block that operates using a power supply system differing from that of the first circuit block. An electrostatic discharge protection circuit that include a PN diode and a diffused resistor is formed in order to prevent electrostatic discharge destruction of a gate insulating film of a transistor that forms the interface circuit. The electrostatic discharge protection circuit may be formed using the remaining basic cells of a gate array that forms the second circuit block. An electrostatic discharge protection circuit formed of a bidirectional diode may be connected between a first low-potential power supply and a second low-potential power supply.

REFERENCES:
patent: 6011681 (2000-01-01), Ker et al.
patent: 7365573 (2008-04-01), Okada
patent: 7417837 (2008-08-01), Chen
patent: 7551055 (2009-06-01), Lee
patent: 2004/0075128 (2004-04-01), Mizuno et al.
patent: 2004/0120087 (2004-06-01), Ishii
patent: 2005/0128174 (2005-06-01), Hung et al.
patent: 2006/0077601 (2006-04-01), Ikeda et al.
patent: A 2000-206177 (2000-07-01), None
patent: A-2000-269432 (2000-09-01), None
patent: A-2004-119883 (2004-04-01), None
patent: A 2006-100606 (2006-04-01), None
patent: A-2006-319268 (2006-11-01), None
U.S. Appl. No. 12/081,008, filed Apr. 9, 2008 by Shinya Sato et al.

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