Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2006-06-30
2009-11-03
Luu, Pho M. (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189040, C365S189170, C365S233100
Reexamination Certificate
active
07613066
ABSTRACT:
In an integrated circuit device, a data line driver block which drives data lines of a display panel based on data supplied from a RAM block from which data is read N times (N is an integer larger than one) in one horizontal scan period 1H of the display panel includes first to N-th divided data line driver blocks disposed along a first direction in which bitlines extend. When data supplied from the RAM block is M bits (M is an integer larger than 1) and grayscale of a pixel corresponding to the data line is G bits, each of the first to N-th divided data line driver blocks includes (M/G) (multiple of three) data line driver cells which drive (M/G) data lines. (M/3G) R data line driver cells are provided in a first subdivided driver, (M/3G) G data line driver cells are provided in a second subdivided driver, and (M/3G) B data line driver cells are provided in a third subdivided driver.
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U.S. App
Ito Satoru
Itomi Noboru
Karasawa Junichi
Kawaguchi Shuji
Kodaira Satoru
Luu Pho M.
Oliff & Berridg,e PLC
Seiko Epson Corporation
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