1978-06-20
1979-03-06
Wojciechowicz, Edward J.
357 42, 357 43, 357 46, 357 51, 357 55, H01L 2702
Patent
active
041433912
ABSTRACT:
An integrated circuit device includes complementary MOS circuit elements formed in an N type semiconductor substrate with a P type region formed in the substrate. Protective circuit elements connected to an input terminal are formed in an area of the substrate other than the region thereof having the complementary MOS circuit elements formed therein. At least one of the regions constituting the protective circuit elements is formed in a P type additional region formed in the area of the N type substrate.
REFERENCES:
patent: 3934159 (1976-01-01), Nomiya et al.
patent: 3955210 (1976-05-01), Bhatia et al.
RCA - Tech. Notes - No. 876 - Feb. 1971 - Dennehy.
Shigematsu Tomohisa
Suzuki Yasoji
Tokyo Shibaura Electric Co. Ltd.
Wojciechowicz Edward J.
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