Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-12-13
2005-12-13
Nguyen, Tan T. (Department: 2818)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C365S189020, C365S230020
Reexamination Certificate
active
06975558
ABSTRACT:
An integrated circuit device is disclosed. In one particular exemplary embodiment, the integrated circuit device may comprise a first circuit to receive, in a multiplexed format, control information and address information, wherein the control information specifies a write operation and the address information specifies a location within a memory array for the write operation. The integrated circuit device may also comprise a second circuit that includes a plurality of output drivers to output write data to be written to the memory array during the write operation, wherein the write data is output after a number of clock cycles of an external clock signal transpire, wherein the write data is output in response to the control information, and wherein each output driver of the plurality of output drivers outputs two bits of the write data during a single clock cycle of the external clock signal.
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Farmwald Michael
Horowitz Mark
Hunton & Williams LLP
Nguyen Tan T.
Rambus Inc.
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