Integrated circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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Details

C257S777000, C257S778000, C361S800000

Reexamination Certificate

active

06489669

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an integrated circuit device having IC chips forming a so-called chip-on-chip structure, in which two IC chips are bonded together through bumps or by another means so as to be electrically connected together.
2. Description of the Prior Art
Conventionally, when two semiconductor chips are mounted on a circuit board, they are sometimes bonded together through bumps or by another means so as to be electrically connected together (hereinafter referred to as a “chip-on-chip structure”). As compared with mounting two chips separately, adopting a chip-on-chip structure offers the advantage of making of the area required on a circuit board smaller.
However, conventionally, as shown in
FIG. 7
, IC chips
100
and
200
forming a chip-on-chip structure are usually simply placed on a circuit board
300
, and thus tend to increase the overall thickness. Moreover, the obverse surface of the IC chip
100
(i.e. that surface of the IC chip
100
to which the IC chip
200
is bonded and on which electrodes are provided) faces away from the circuit board
300
, and therefore the wiring pattern (not shown) formed on the circuit board
300
needs to be connected to the IC chip
100
by the use of wires
400
such as gold wires. As a result, in particular in the case of a circuit that handles a high-frequency signal, the inductance of the wires
400
tend to cause poor or uneven sensitivity.
Moreover, in the case of a circuit that handles a high-frequency signal, it is essential to provide shielding against noise. Conventionally, as shown in
FIG. 8
, such shielding is realized by the use of shielding material
500
. Providing shielding in this way, however, not only requires a large amount of shielding material, and thus hampers cost reduction and weight reduction, but also further increases the overall thickness. This often makes an arrangement like this unusable in thin devices such as IC cards and cellular telephones.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an integrated circuit device having IC chips forming a chip-on-chip structure that helps achieve further thickness reduction and that minimizes trouble due to inductance in a case where a high-frequency signal is handled.
Another object of the present invention is to provide an integrated circuit device having IC chips forming a chip-on-chip structure that reduces the amount of shielding material required, or even eliminates the need therefor, in providing necessary shielding and thereby helps achieve cost reduction and weight reduction.
To achieve the above objects, according to one aspect of the present invention, an integrated circuit device is provided with a first IC chip, a second IC chip, and a circuit board having a hole formed therein that is large enough to permit the second IC chip to be accommodated therein. Here, the first and second IC chips are bonded together so as to be electrically connected together, and the first IC chip is mounted on the circuit board with the second IC chip accommodated in the hole formed in the circuit board.
In this arrangement, one of the IC chips forming a chip-on-chip structure is accommodated in the hole formed in the circuit board. This helps achieve further thickness reduction. In addition, the obverse surfaces of the IC chips (i.e. the surfaces on which the IC chips are bonded together) are located closer to the circuit board. This makes it possible to mount the IC chips, even though they form a chip-on-chip structure, on the circuit board on a wireless basis (without using wires), i.e. through connection using bumps or by another means. In this way, it is possible to reduce trouble due to inductance in a circuit that handles a high-frequency signal.
The circuit board may have shielding pattern formed around the portion thereof where the first IC chip is connected to the circuit board. This makes it possible to shield the noise coming from where the IC chip is connected to the circuit board, and thus helps enhance the shielding effect.
Shielding material connected to fixed potential point may be provided in the hole formed in the circuit board. This permits the portion of the circuit board on which the IC chips forming a chip-on-chip structure are mounted to be surrounded by the shielding material connected to the fixed potential point and by the reverse surfaces of the IC chips (the surfaces of the IC chips opposite to the surfaces thereof on which they are bonded together), which also offer a shielding effect. Thus, it is possible to obtain a sufficient shielding effect.
The shielding material has only to be somewhat larger than the smaller of the IC chips forming a chip-on-chip structure. This helps reduce the amount of shielding material required as compared with conventional arrangements and thereby achieve cost reduction and eight reduction. By making the shielding material somewhat larger than the larger of the IC chips forming a chip-on-chip structure, it is possible to obtain a higher shielding effect.
According to another aspect of the present invention, an integrated circuit device is provided with a first IC chip, a second IC chip, and a multilayer circuit board having a recess formed therein that is large enough to permit the second IC chip to be accommodated therein. Here, the first and second IC chips are bonded together so as to be electrically connected together, and the first IC chip is mounted on the multilayer circuit board with the second IC chip accommodated in the recess formed in the multilayer circuit board. Moreover, a wiring pattern connected to a fixed potential point is formed around the recess formed in the multilayer circuit board.
In this arrangement, one of the IC chips forming a chip-on-chip structure is accommodated in the recess formed in the multilayer circuit board. This helps achieve further thickness reduction. In addition, the portion of the multilayer circuit board on which the IC chips forming a chip-on-chip structure are mounted is surrounded by the wiring pattern connected to the fixed potential point and formed inside the multilayer circuit board and by the reverse surfaces of the IC chips (the surfaces of the IC chips opposite to the surfaces thereof on which they are bonded together), which also offer a shielding effect. Thus, it is possible to obtain a sufficient shielding effect. Since the wiring pattern formed inside the multilayer circuit board is used as shielding material, there is no need to provide shielding material separately, and thus it is possible to achieve further cost reduction and weight reduction.


REFERENCES:
patent: 5198963 (1993-03-01), Gupta et al.
patent: 5608262 (1997-03-01), Degani et al.
patent: 6154370 (2000-11-01), Degani et al.
patent: 6297551 (2001-10-01), Dudderar et al.

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