Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Logic design processing
Reexamination Certificate
2011-06-21
2011-06-21
Garbowski, Leigh Marie (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Logic design processing
C716S108000, C716S133000
Reexamination Certificate
active
07966593
ABSTRACT:
An integrated circuit design system, method, and computer program product are provided that takes into account signal stability. In use, at least one condition is identified where an output of a logic element before receipt of a clock signal is the same as the output of the logic element after receipt of the clock signal. To this end, such logic element may be disabled based on the identified condition for power savings or other purposes.
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patent: 7761827 (2010-07-01), Ramachandran et al.
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U.S. Appl. No. 11/832,425, filed Aug. 1, 2007.
Haldar Malay
Mathur Anmol
Ramachandran Venky
Roy Sumit
Tripathi Nikhil
Calypto Design Systems, Inc.
Garbowski Leigh Marie
Zilka-Kotab, PC
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