Boots – shoes – and leggings
Patent
1995-01-17
1997-11-18
Teska, Kevin J.
Boots, shoes, and leggings
364488, 364489, 364491, G06F 1750
Patent
active
056894325
ABSTRACT:
A method for designing an integrated circuit involves a four step process. First, a behavioral circuit model (BCM) is read which contains assignment statements which identify the logical operation of an integrated circuit (IC). The BCM is translated to a data file which described a plurality of interconnected logic gate functions to duplicate the operation of the BCM. The gates in the data file are then assigned a specific Vdd and ground rail size, a specific drive strength for speed considerations, and a cell pitch or height to optimize physical layout, in any order. The result in a physical design file which may be used to form masks and integrated circuits having optimized speed and optimized circuit area in a short design cycle.
REFERENCES:
patent: 4827427 (1989-05-01), Dunlop et al.
patent: 5031111 (1991-07-01), Chao et al.
patent: 5222030 (1993-06-01), Dangelo et al.
patent: 5299137 (1994-03-01), Kingsley
patent: 5349542 (1994-09-01), Brasen et al.
patent: 5351197 (1994-09-01), Upton et al.
patent: 5369596 (1994-11-01), Tokumaru
patent: 5455775 (1995-10-01), Huber et al.
patent: 5502649 (1996-03-01), Hirata
patent: 5510999 (1996-04-01), Lee et al.
patent: 5537580 (1996-07-01), Giomi et al.
Motorola H4CPlus Series Design Ref. Guide, Rev. 2 1995.
"Experiments Using Automatic Physical Design Techniques for Optimizing Circuit Performance," Dunlop et al; 1990 IEEE, pp. 216-220.
"Computing the Entire Active Area Versus Delay Trade-Off Curve for Gate Sizing with a Piecewise Linear Simulator," Buurman et al.
"Optimization-Based Transistor Sizing," Shyu et al; IEEE 1987 Custom Integrated Circuits Conference, pp. 417-420.
Blaauw David T.
Guruswamy Mohankumar
Jones Larry G.
Maziasz Robert L.
Norton Joseph W.
Motorola Inc.
Teska Kevin J.
Walker Tyrone V.
Witek Keith E.
LandOfFree
Integrated circuit design and manufacturing method and an appara does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit design and manufacturing method and an appara, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit design and manufacturing method and an appara will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1570468