Integrated circuit copper metallization process using a lift-off

Details Integrated circuit copper metallization process using a lift-off Integrated circuit copper metallization process using a lift-off

1990-04-30

1994-05-31

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437189, 257750, 257751, H01L 2100, H01L 2102, H01L 2144, H01L 2148

Patent

active

053169743

ABSTRACT:
An improved metallized structure (10) is formed from a copper seed layer (46) and a copper structure (48). Semiconductor devices to be connected (16-18) are covered by a conductive barrier layer (20). An oxide layer (28) is then deposited over the barrier layer (20) and patterned using standard photolithographic techniques and an anisotropic plasma etch. Vertical sidewalls (36-38) are formed by the etch and an HF deglaze. A seed layer (44-46) is then sputtered onto a photoresist layer (30) and the exposed barrier layer (20). After stripping the photoresist (30) and the seed layer (44) thereon, the copper structure (48) is electroplated over the remaining seed layer (46). The structure (48) thus formed has approximately vertical sidewalls (24-26) for improved contact with subsequent layers.

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IBM Technical Disclosure Bulletin, vol. 31, No. 3, Aug., 1988, pp. 477-478.
Flinn, R., Engineering Materials and Their Applications, pp. 631-632 Houghton Mifflin Co., 1986.
Vossen, J., Thin Film Procsses, pp. 229-230, Academic Press, 1977.
Sze, S., VLSI Technology, pp. 270, 304-306, McGraw-Hill, 1983.
Colclaser, R., Microelectronics: Processing and Device Design, Wiley & Sons, 1980.

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