Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2002-05-14
2004-11-23
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S508000, C257S700000, C257S698000, C257S920000, C257S781000
Reexamination Certificate
active
06822329
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to integrated circuits, and, more particularly, to the structure of the integrated circuit connecting pads.
BACKGROUND OF THE INVENTION
The connecting pads of an integrated circuit, which are generally disposed at its periphery, form the input/output terminals of the integrated circuit. The integrated circuit is conventionally encapsulated in resin packaging that also supports the metal pins that are intended to be soldered to an electronic circuit card. The connection between the connecting pads of the integrated circuit and the metal pins is made by wires that are generally gold or sometimes aluminum welded to the metal pins and to the metal top surface of the connecting pads.
With the structures usually used for the connecting pads, the operation of welding a wire to the top surface of the connecting pad introduces a risk of delamination and a risk of microcracks appearing in the structure of the connecting pad because of the high stresses applied to the gold ball to weld it or to crush the aluminum wire. This risk, even though it is under control in the technologies currently used, sometimes necessitates additional constraints in respect of the soldering machines, and in particular individual adjustment of the welding parameters.
Moreover, this risk of delamination and of microcracks appearing increases as the size of the connecting pads decreases, especially for a 0.18 &mgr;m or smaller technology.
SUMMARY OF THE INVENTION
An object of the invention is to provide a connecting pad structure that minimizes or even eliminates the risks of delamination and of microcracks appearing, even for advanced technologies, in particular for 0.18 &mgr;m and smaller technologies, in which the size of the gold ball deposited on the top surface of the connecting pad is especially small.
Another object of the invention is to provide a connecting pad that is structurally compatible with many applications, including radio frequency applications.
The invention therefore provides an integrated circuit including a plurality of levels of metallization and connecting pads. Each connecting pad includes a continuous top metal layer on the top metallization level and having on its top face an area for welding a connecting wire, and a reinforcing structure under the welding area and including at least one discontinuous metal layer on the immediately next lower metallization level, metal vias connecting the discontinuous metal layer to the bottom surface of the top metal layer, and an isolating covering that covers the discontinuous metal layer and its discontinuities as well as the inter-via spaces between the two metallic layers.
It should be noted that combining a discontinuous metal layer with metal vias connecting the discontinuous layer to the top layer, the combination being covered in an isolating covering, for example of silicon dioxide, forms a reinforcing structure that is mechanically strong to resist the stresses applied during welding. The vias attach the top layer to the isolation, which helps to minimize the risk of delamination, and the discontinuous layer compensates the weaknesses of the isolating covering caused by the vias and in particular minimizes the appearances of microcracks.
As used herein, the term “discontinuous metal layer” advantageously includes separate distinct metal discontinuities.
Although the discontinuous metal layer can be formed in various ways, it is particularly advantageous if it is formed of regularly distributed discontinuous individual patterns each formed of a plurality of separate parallel metal strips, for example, each metal strip then supporting a plurality of separate metal vias.
Moreover, with the desire to avoid a predominant direction of the discontinuities of the metal layer, which could be problematic if that direction were to correspond to the general direction of vibration of the connecting pad during ultrasound welding, it is preferable for the respective general orientations of two adjacent patterns to be different, for example orthogonal.
Moreover, although it is additionally possible to use the reinforcing structure, especially the discontinuous metal layer and the vias, to form an electrical connection between the connecting wires and the bottom metallization layers of the integrated circuit, it is particularly advantageous, in particular to avoid too high a capacitance of the connecting pad (which is particularly beneficial in radio frequency applications), for the connecting pad to include a peripheral metal ring situated on the same metallization level as the discontinuous metal layer, surrounding the discontinuous metal layer and electrically isolated from it by the isolating covering. Moreover, peripheral metal vias then connect the peripheral ring to a peripheral area of the bottom surface of the top metal layer.
Moreover, to enable an electrical contact to be provided on any metallization level of the integrated circuit, the connecting pad can include a plurality of stacked peripheral metal rings on respective different metallization levels, each peripheral ring being connected to the immediately adjacent ring by peripheral metal vias. The reinforcing structure can include a single discontinuous metal layer situated immediately under the top metal layer of the connecting pad. In this case, the isolating covering of the connecting pad can extend as far as the integrated circuit bulk. This kind of architecture is particularly beneficial in radio frequency applications, because the connecting pad then has a relatively low capacitance.
This being the case, in other applications the reinforcing structure can include a plurality of stacked discontinuous metal layers on respective different metallization levels and connected to each other by metal vias. The isolating covering then also covers each discontinuous metal layer and its discontinuities as well as the inter-via spaces between two adjacent discontinuous metal layers.
Still with an object of increasing the mechanical strength of the structure, in particular to resist vibration resulting from ultrasound-assisted welding, it is advantageous for two stacked patterns belonging to two respective adjacent discontinuous metal levels to be offset from each other or to have respective different, for example orthogonal, general orientations. The metal layers of the connecting pad can be of aluminum and the vias of tungsten. It is nevertheless equally possible for the metal layers and the vias to be of copper. However, in this case, the discontinuity of each discontinuous metal layer is advantageously chosen so that the copper density is from approximately 20% to approximately 80% in a 50 &mgr;m×50 &mgr;m window, to be compatible with a mechanical-chemical polishing step used in the process, e.g. a damascene process, for producing lines and vias.
REFERENCES:
patent: 5736791 (1998-04-01), Fujiki et al.
patent: 6100589 (2000-08-01), Tanaka
patent: 6198170 (2001-03-01), Zhao
patent: 6297563 (2001-10-01), Yamaha
patent: 6313540 (2001-11-01), Kida et al.
patent: 6448641 (2002-09-01), Ker et al.
patent: 0 875 934 (1998-11-01), None
Patent abstracts of Japan vol. 2000, No. 10 published Jul. 14, 2000 and JP 2000195896 entitled Semiconductor Device.
Bouche Guillaume
Gonella Roberto
Sabouret Eric
Varrot Michel
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Jackson Jerome
Jorgenson Lisa K.
Landau Matthew
STMicroelectronics SA
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