Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Reexamination Certificate
2002-11-05
2004-12-14
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
C700S003000
Reexamination Certificate
active
06831583
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an integrated circuit comprising a microprocessor and an analogue to digital converter (ADC) in which the ADC is selectively and alternately operable under the control of the microprocessor and independently thereof for transferring conversion results to an external device independently of the microprocessor, and the invention also relates to a method for operating the integrated circuit in a first mode in which the ADC is operated under the control of the microprocessor and in a second mode in which conversion results are transferred from the ADC to the external device independently of the microprocessor.
BACKGROUND TO THE INVENTION
Integrated circuits which comprise a microprocessor and an ADC have many advantages. For example, the microprocessor may be used to set up the signals to be converted by the ADC. The microprocessor can also communicate with other devices in the integrated circuit and external systems, which are external to the integrated circuit, and thus can transfer the conversion results from the ADC internally to the other devices in the integrated circuit, and/or externally of the integrated circuit to the external systems. A further advantage is that the conversion results from the ADC can subsequently be processed by the microprocessor. However, the provision of a microprocessor and an ADC in an integrated circuit can be disadvantageous, particularly where the processing rate of the microprocessor is less than the conversion rate of the ADC. If the conversion rate of the ADC is high with respect to the processing rate of the microprocessor, the microprocessor may have insufficient processing power to read the conversion results from the ADC and then to perform an operation on the conversion results, for example, to write the conversion results to on-chip or external memory. A further disadvantage of such a combination of a microprocessor and an ADC is that each time a conversion cycle has been completed by the ADC the microprocessor is required to transfer the conversion results from the ADC. This necessitates the microprocessor interrupting a current task in order to transfer the data from the ADC. This leads to inefficient operation of the microprocessor and the ADC, and in particular prevents the ADC operating at its full conversion rate. Furthermore, the processing time of the microprocessor available for carrying out other tasks is reduced.
Various solutions have been implemented to overcome these problems, however, none have been entirely satisfactory. One such solution requires the provision of a buffer to store the conversion results from the ADC, and on the assumption that the ADC will not be continuously converting at full speed, the microprocessor can then subsequently process or transfer the conversion results at its own speed. However, the disadvantage of this solution is that processing time of the microprocessor is still required in order to process or transfer the conversion results from the ADC. An alternative solution includes the provision of a direct memory access channel along which the conversion results from the ADC are transferred to memory. However, the disadvantage of this solution is that the microprocessor cannot access memory or other peripherals while the direct memory access is in progress.
There is therefore a need for an integrated circuit which comprises a microprocessor and an ADC in which the ADC is selectively and alternately operable under the control of the microprocessor, and independently thereof for transferring conversion results to an external device independently of the microprocessor, and there is also a need for a method for selectively operating the integrated circuit with the ADC operating under the control of the microprocessor and independently thereof for transferring the conversion results to the external device independently of the microprocessor.
The present invention is directed towards providing such an integrated circuit and a method.
SUMMARY OF THE INVENTION
According to the invention there is provided an integrated circuit comprising:
a microprocessor,
an analogue to digital converter (ADC),
an interface for communicating the integrated circuit with an external device,
a switch circuit for selectively and alternately configuring the integrated circuit to operate in a first mode with the microprocessor communicating with the interface through the switch circuit and the ADC operating in a dependent mode under the control of the microprocessor, and a second mode with the ADC operating in an independent mode communicating with the interface through the switch circuit for transferring conversion results from the ADC through the interface to an external device independently of the microprocessor.
Preferably, conversion results are transferred from the ADC to the interface when the integrated circuit is operating in the second mode without interfering with the operation of the microprocessor.
In one embodiment of the invention the switch circuit is responsive to the microprocessor for configuring the integrated circuit to operate in the first and second modes.
In another embodiment of the invention the interface is configurable by the microprocessor for transmitting conversion results from the ADC to the external device in the independent mode of operation of the ADC.
Preferably, the interface is selectively configurable by the microprocessor in one of a master mode and a slave mode for facilitating transmission of the conversion results to the external device from the ADC in the independent mode of operation of the ADC.
Advantageously, the ADC is selectively and alternately configurable by the microprocessor to operate alternately in the independent mode and the dependent mode.
In one embodiment of the invention the switch circuit is responsive to a signal outputted by the ADC in response to the ADC being configured by the microprocessor to operate in the one of the dependent mode and independent mode for configuring the integrated circuit to operate in the corresponding one of the first mode and the second mode.
In another embodiment of the invention the microprocessor is responsive to primary code stored in memory of the integrated circuit for operating the switch circuit for selectively and alternately configuring the integrated circuit to operate in the first mode and the second mode, and in one embodiment of the invention the memory is flash memory.
In a further embodiment of the invention the microprocessor is responsive to an externally generated signal for selectively and alternately configuring the integrated circuit to operate in the first mode and in the second mode.
In one embodiment of the invention each conversion result is transferred from the ADC to the interface in response to a signal from the ADC indicating the conversion result is ready.
In one embodiment of the invention the interface is an N-bit interface, and the ADC is of M-bit resolution, M being greater than N.
Preferably, a temporary storing register is provided for storing some of the M bits of each conversion result, while the other of the M bits of the conversion result are being transferred from the ADC to the interface.
In one embodiment of the invention the switch circuit selectively and alternately communicates the interface with the temporary storing register and the ADC for selectively and alternately transferring the bits stored in the temporary storing register to the interface and the bits to be transferred directly from the ADC to the interface.
Preferably, the switch circuit is responsive to a signal from the interface for selectively communicating the interface with the temporary storing register for transferring the bits of the conversion result from the temporary storing register to the interface.
Advantageously, the interface is a serial interface, and a counter is provided responsive to a clock signal clocking the bits out of the interface to the external device for counting the bits being transmitted from the interface, and the switch circuit is respon
Casey Gary
Leamy Fintan Michael
Moss Brian Joseph
O'Dowd Thomas Brendan
Analog Devices Inc.
Wamsley Patrick
LandOfFree
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