Integrated circuit comprising a device for protection against el

Details Integrated circuit comprising a device for protection against el Integrated circuit comprising a device for protection against el

1988-08-10

1990-02-20

James, Andrew J.

357 34, 357 35, 357 50, 357 65, H01L 2978, H01L 2972, H01L 2704

Patent

active

049030957

ABSTRACT:
The protection device according to the invention is of the type comprising three active regions of alternating conductivity types, whose extreme regions are connected on the one hand to an input to be protected and on the other hand to a supply voltage source of the circuit.
The first active region (2) forms a strip surrounded by the second active region (3). Contact regions (6 and 7) cover the active regions (2 and 3, respectively) and are covered by metallizations (8 and 9), respectively). The contact regions (6 and 7) are separated by thick insulating regions (4). One of the metallizations (8) is connected to the input to be protected and the other metallization (9) is connected to a reference voltage source.

REFERENCES:
patent: 2981877 (1961-04-01), Noyce
patent: 3697828 (1972-10-01), Oakes
patent: 3890634 (1975-06-01), Ruegg
patent: 4064527 (1977-12-01), Shier
patent: 4250518 (1981-02-01), Bloodworth et al.
patent: 4319262 (1982-03-01), Bertotti et al.
patent: 4511912 (1985-04-01), Mahrla
patent: 4821089 (1989-04-01), Strauss
Fischer et al., "Resistor-Thick Oxide FET Gate Protection Device for Thin Oxide FET", IBM Technical Disclosure Bulletin, vol. 13, No. 5, Oct. 1970.
Banker et al., "Lateral NPN Protect Device", IBM Technical Disclosure Bulletin, vol. 23, No. 9, Jul. 1980.
Pease, "Latchup In Bipolar LSI Devices", IEEE Transactions on Nuclear Science, vol. NS-28, No. 6, Dec. 1981.

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