Integrated circuit chip package with improved cooling means

Electricity: conductors and insulators – Feedthrough or bushing – Compression

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357 72, 357 80, 174 52PE, H01L 2302, H01L 2328, H01L 3902

Patent

active

043969364

ABSTRACT:
An integrated circuit package in which an integrated circuit chip having flexible beam leads, the inner lead bonding sites of which are bonded to input and output terminals on the active face of the chip, is mounted active face down on the top surface of a substrate. The top surface of the substrate is provided with a chip pad on which the integrated circuit chip is mounted and outer lead pads. The back surface of the substrate has a heat sink pad which is positioned substantially opposite the chip pad. A plurality of thermal passages is formed through the substrate interconnecting the chip pad and the heat sink pad. A good thermally conductive material fills the passages. A preform comprising a segment of fiber glass web coated with a thermosetting and thermally conductive plastic is positioned on each chip pad between the chip pad and the active face of the integrated circuit chip. The plastic material of the preform encapsulates the active face of the chip, including a portion of each of the leads proximate the chip and secures the chip to the chip pad. The outer lead bonding sites of the leads are bonded to outer lead pads of the substrate with exposed portions of the leads between the outer lead pads and the encapsulated portions being bent away from the substrate and under compression. A heat sink is bonded to the heat sink pad. The plastic material of the preform, the chip pad and the thermally conductive material filling the thermal passages provide a low impedance thermal path between the integrated circuit chip and the heat sink.

REFERENCES:
patent: 3296501 (1962-11-01), Moore
patent: 3594619 (1971-07-01), Kamoshida et al.
"Microcircuit Heat Sink", G. B. Cherniak et al., IBM Technical Disclosure Bulletin, vol. 8, No. 10, Mar. 1966, p. 1457.
"Multilayer Module", W. Fedrowitz et al., IBM Technical Disclosure Bulletin, vol. 20, No. 12, May 1978, pp. 5172-5174.
"Stacked Thermally Enhanced High Package Density Module", R. Marks et al., IBM Technical Disclosure Bulletin, vol. 23, No. 11, Apr. 1981, p. 4835.

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