Integrated circuit chip package and method of making the same

Details Integrated circuit chip package and method of making the same Integrated circuit chip package and method of making the same

1997-12-03

2000-09-26

Cuchlinski, Jr., William A.

Electricity: conductors and insulators

Boxes and housings

Hermetic sealed envelope type

361762, 361770, 257687, 257778, 257770, H01L 2328

Patent

active

061245461

ABSTRACT:
A semiconductor integrated circuit chip package includes top and bottom interposers 2 and 4, a semiconductor die 14 attached to the top interposer 2, a wirebond 18 or a flipchip connector 52 connected between the die 14 and the top interposer 2, and a tab bond 22 providing an electrical connection from the wirebond 18 or the flipchip connector 52 to outside the bottom interposer 4. A method of making the chip package includes providing top and bottom interposers 2 and 4, attaching a semiconductor die 14 to the top interposer 2, providing a wirebond 18 or a flipchip connector 52 between the die 14 and the top interposer 2, providing a tab bond 22 between the top and bottom interposers 2 and 4, and providing an encapsulant 16 to fill the intermediate volume 40 between the top and bottom interposers 2 and 4.

REFERENCES:
patent: 5019673 (1991-05-01), Juskey et al.
patent: 5126278 (1992-06-01), Kodaira
patent: 5285352 (1994-02-01), Pastore et al.
patent: 5490324 (1996-02-01), Newman
patent: 5814894 (1998-09-01), Igarashi et al.
patent: 5834835 (1998-11-01), Maekawa
patent: 5844315 (1998-12-01), Melton et al.

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