Integrated circuit chip having on-chip signal integrity and...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system

Reexamination Certificate

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C703S003000, C703S014000, C703S018000

Reexamination Certificate

active

07844435

ABSTRACT:
An integrated circuit chip has new Frequency dependent RLC extraction and modeling providing on chip integrity and noise verification and the extraction and modeling employs:A) 2D scan line algorithm for the collection of adjacent signal and power conductor coordinates;B) In core pair-wise frequency Dependent RL extraction;C) In core equivalent circuit synthesis;D) caching and partitioning RL extraction techniques for run time efficiency; andE) Techniques for synthesizing stable circuits to represent frequency dependent RL circuits for non-mono tonic R12.

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