Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor – With peripheral feature due to separation of smaller...
Reexamination Certificate
2006-11-21
2006-11-21
Pham, Thanhha S. (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
Physical configuration of semiconductor
With peripheral feature due to separation of smaller...
C257S629000
Reexamination Certificate
active
07138702
ABSTRACT:
An integrated circuit chip is provided. The chip includes a silicon substrate, a circuit, a seal ring, a ground ring and a guard ring. The circuit is formed on the silicon substrate and has an input/output (I/O) pad. The seal ring is formed on the silicon substrate and surrounds the circuit and the I/O pad. The ground ring is formed between the silicon substrate and the I/O pad, and the ground ring is electrically connected with the seal ring. The guard ring is formed above the silicon substrate and surrounds the I/O pad, and the guard ring is electrically connected with the seal ring.
REFERENCES:
patent: 6303977 (2001-10-01), Schroen et al.
patent: 6376899 (2002-04-01), Seshan et al.
patent: 6566736 (2003-05-01), Ogawa et al.
patent: 6815821 (2004-11-01), Yu
Airoha Technology Corp.
Pham Thanhha S.
Rabin & Berdo PC
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