Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Patent
1996-02-06
1998-06-09
Graybill, David
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
438106, 439525, 439526, H01L 2160
Patent
active
057632979
ABSTRACT:
An IC carrier on which an integrated circuit (IC) package is loaded when electric testing of the IC package is carried out is described. The present invention enables an IC package to be loaded on or unloaded from the IC carrier smoothly without bending any of closely arranged fine leads, and prevents the lead from being deformed by falling impact when it is dropped. According to the present invention, an IC carrier for an IC package having an array of leads comprises an array of socket means for mating with the array of leads, wherein selected one of said socket means differs in an inner dimension from the other ones in the same array. The technique is applicable to both a flat IC package (QFP or SOP) and a pin grid array IC package (PGA).
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Tashiro Kazuhiro
Wakabayashi Tetsushi
Fujitsu Limited
Graybill David
Turner Kevin F.
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