Integrated circuit arrangement for generating a digital...

Details Integrated circuit arrangement for generating a digital... Integrated circuit arrangement for generating a digital...

2011-07-19

2011-07-19

Nguyen, Khanh V (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including gain control means

C330S307000

Reexamination Certificate

active

07982540

ABSTRACT:
The invention proposes an integrated circuit arrangement (10) for generating a digital variable gain control signal (SA) for a digitally variable gain amplifier (14), comprising: a memory (16) for storing at least one digital signal sequence (DS) defining a time gain profile, a controller (18) for generating the digital variable gain control signal (SA) by reading out the memory (16), and a programming interface (20) for programming the memory (16). The integrated circuit arrangement (10) in accordance with the invention makes it possible to read out e.g. a gain characteristic as needed at the time for an ultrasound or radar application of a VGA in fast response at a defined rate from the memory (16).

REFERENCES:
patent: 4675854 (1987-06-01), Lau
patent: 5561395 (1996-10-01), Melton et al.
patent: 7423482 (2008-09-01), Blon
patent: 7463872 (2008-12-01), Jin et al.
patent: 2007/0075768 (2007-04-01), Blon
patent: 2008/0204143 (2008-08-01), Montemayor et al.
patent: 3339984 (1985-05-01), None
patent: 102005047172 (2007-04-01), None

Affiliated with

Also associated with

Rating

Integrated circuit arrangement for generating a digital... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit arrangement for generating a digital..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit arrangement for generating a digital... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2693689