Semiconductor device manufacturing: process – Making conductivity modulation device
Reexamination Certificate
2009-01-09
2011-11-15
Vu, David (Department: 2818)
Semiconductor device manufacturing: process
Making conductivity modulation device
C257S458000, C257S462000
Reexamination Certificate
active
08058111
ABSTRACT:
An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.
REFERENCES:
patent: 6380603 (2002-04-01), Takimoto et al.
patent: 2004/0097031 (2004-05-01), Lee et al.
patent: 0 353 509 (1989-07-01), None
patent: 0 778 621 (1996-12-01), None
patent: 1 333 499 (2003-01-01), None
patent: 02 238664 (1990-09-01), None
patent: WO 02/33755 (2002-04-01), None
patent: WO 2004/025739 (2004-03-01), None
Non-certified English translation of the German Office Action dated May 30, 2005.
German Office Action dated May 30, 2005 [cited in Applicants' Information Disclosure Statement filed on Dec. 28, 2006].
Japanese Office Action (English Translation) dated Jun. 1, 2010, Patent Application No. 2007-518581—(9 pgs).
Langguth Gernot
Mueller Karlheinz
Wille Holger
Infineon - Technologies AG
Vu David
LandOfFree
Integrated circuit arrangement comprising a pin diode, and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated circuit arrangement comprising a pin diode, and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit arrangement comprising a pin diode, and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4255306