Integrated circuit apparatus

Details Integrated circuit apparatus Integrated circuit apparatus

2007-09-25

2007-09-25

Dinh, Son (Department: 2824)

Static information storage and retrieval

Powering

C365S189070

Reexamination Certificate

active

11322425

ABSTRACT:
An integrated circuit apparatus includes a SRAM cell array having a plurality of memory cells formed of CMOSFET arranged lattice-like. The SRAM cell array has a pair of power line and ground line in each of 1-bit sequences. The integrated circuit apparatus also includes a detector detecting the occurrence of latch-up for each 1-bit sequence and outputting a detection signal, and a power controller controlling a power supply voltage to the power line for each 1-bit sequence. The power controller reduces a voltage to be supplied to the power line in the 1-bit sequence where latch-up is occurring down to a predetermined value according to the detection signal.

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T. Calin et al., IEE Transactions on Nuclear Science, Dec. 1995, vol. 42, No. 6, pp. 1592-1598.

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