Integrated circuit and method of outputting data from a FIFO

Details Integrated circuit and method of outputting data from a FIFO Integrated circuit and method of outputting data from a FIFO

2005-01-25

2005-01-25

Tan, Vibol (Department: 2819)

Electrical computers and digital processing systems: processing

Processing architecture

Microprocessor or multichip or multimodule processor having...

C711S005000, C711S119000

Reexamination Certificate

active

06848042

ABSTRACT:
A method of outputting data from a FIFO incorporated in an integrated circuit generally determines whether input data is valid during a first clock cycle. The method then outputs data from a plurality of output barrel slots during a second clock cycle. Data is then shifted from predetermined upper barrel slots to predetermined output barrel slots during second cycle based upon a barrel count. Finally, data is shifted into the FIFO during said second cycle based upon the barrel count. A new barrel count of valid data in the FIFO can then be determined. Circuitry for implementing the embodiments of the invention is also disclosed.

REFERENCES:
patent: 5519345 (1996-05-01), Farrell et al.
patent: 5831467 (1998-11-01), Leung et al.
patent: 5954811 (1999-09-01), Garde
patent: 6212591 (2001-04-01), Kaplinsky

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