Integrated circuit and method for its manufacture

Details Integrated circuit and method for its manufacture Integrated circuit and method for its manufacture

2005-12-06

2005-12-06

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With specified crystal plane or axis

C257S347000

Reexamination Certificate

active

06972478

ABSTRACT:
An integrated circuit and methods for its manufacture are provided. The integrated circuit comprises a bulk silicon substrate having a first region of <100> crystalline orientation and a second region of <110> crystalline orientation. A layer of silicon on insulator overlies a portion of the bulk silicon substrate. At least one field effect transistor is formed in the layer of silicon on insulator, at least one P-channel field effect transistor is formed in the second region of <110> crystalline orientation, and at least one N-channel field effect transistor is formed in the first region of <100> crystalline orientation.

REFERENCES:
patent: 5384473 (1995-01-01), Yoshikawa et al.
patent: 2004/0256700 (2004-12-01), Doris et al.

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