Integrated circuit and A/D conversion circuit

Details Integrated circuit and A/D conversion circuit Integrated circuit and A/D conversion circuit

2003-12-10

2004-11-23

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S172000

Reexamination Certificate

active

06822599

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2002-341096, filed on Nov. 25, 2002, the entire contents of which are incorporated herein by reference.
FIELD OF THE INVENTION
The present invention relates to a general integrated circuit, and more specifically to an integrated circuit and A/D converting circuit utilizing a switched capacitor circuit.
BACKGROUND OF THE INVENTION
The switched capacitor circuit is an element circuit which may be widely used in a highly accurate and low power consumption D/A converting circuit, A/D converting circuit and filter, or the like.
The prior art technology of the D/A converting circuit using the switched capacitor circuit is disclosed, for example, in Japanese Published Unexamined Patent Application No. 55121/1999. This circuit holds, in a first period, any current of V
r+
and V
r−
to i unit capacitors C depending on the digital signals S
1
to S
i
taking the value −1 or 1, and outputs, in a second period, the voltage of V
r
(S
i
+S
i−1
+ . . . +S
1
)/i (V
r
is the absolute value of V
r+
or V
r−
.) Accordingly, an interior division voltage between V
r+
and V
r−
is generated.
Moreover, Japanese Published Unexamined Patent Application No. 152413/1994 discloses a circuit which divides voltage using two differential amplifiers and a resistance line, and also generates not only an interior division voltage for two analog voltages V
1
and V
2
but also an exterior division voltage for voltages V
1
and V
2
(voltage not within the range of the voltages V
1
and V
2
).
In an A/D converting circuit (for example, complementary type) which generates an analog voltage for conversion of lower-digit bits using the result of a comparator corresponding to higher-digit bits, the selection range is generally given the redundancy to reduce the influence of determination error due to the offset of the comparator. In this circuit, it is desirable to realize the voltage within the redundancy range, namely the exterior division voltage with the simplified and low power consumption circuit structure.
SUMMARY OF THE INVENTION
The technology discussed above cannot generate an exterior division voltage. Other technologies can generate an exterior division voltage but is inferior in the viewpoint of the power consumption and circuit area because two amplifiers are required and connections are also complicated. Moreover, since the resistance value of the resistance element generally includes large a fluctuation, there is a problem in the accuracy of the divided voltage generated.
Considering the background described above, the present invention to provides a low power consumption integrated circuit of small area which can generate an exterior division voltage of higher accuracy.
The present invention provides an integrated circuit comprising an interior division circuit for holding a first amount of charges corresponding to the weighted sum of a first analog voltage and a second analog voltage depending on a digital signal, an exterior division circuit for holding a second amount of charges corresponding to difference between the first analog voltage and the second analog voltage, and an amplifying circuit for generating a voltage depending on the sum of the first amount of charges and the second amount of charges to form the voltage not within the range between the first analog voltage and the second analog voltage.
A further aspect of the present invention is that an exterior division voltage may be generated through the addition of a predetermined potential to an interior division voltage by holding, with the interior division circuit, the charges corresponding to the interior division voltage obtained by dividing the range between the first analog voltage and the second analog voltage, holding, with the exterior division circuit, the charges corresponding to the difference of the first analog voltage and the second analog voltage, and by generating the voltage obtained by combining these charges with an amplifier. Accordingly, the voltage may be divided by using a capacitance element with less fluctuation and the exterior division voltage may be generated based the simplified circuit structure. As a result, it is possible to provide a low power consumption integrated circuit of having a small area which can generate an exterior division voltage with higher accuracy.
In the integrated circuit described above, an exterior division voltage may be generated through addition of the predetermined potential to an interior division voltage by holding, with an interior division circuit, the charge corresponding to an interior division voltage obtained by dividing the range between the first analog voltage and the second analog voltage, holding, with an exterior division circuit, the charge corresponding to the difference between a first analog voltage and a second analog voltage and then amplifying a voltage obtained by coupling these charges with an amplifier. Therefore, it is possible to divide the voltage using a capacitance element having less fluctuation and to generate an exterior division voltage with the simplified circuit structure. Accordingly, a low power consumption and small area integrated circuit which can generate an exterior division voltage of higher accuracy may be included.


REFERENCES:
patent: 4803382 (1989-02-01), Tanimoto et al.
patent: 5241270 (1993-08-01), Ng
patent: 6504500 (2003-01-01), Tsukamoto
patent: 2003/0011406 (2003-01-01), Choi et al.

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