Integrated circuit analog-to-digital converter and associated ca

Details Integrated circuit analog-to-digital converter and associated ca Integrated circuit analog-to-digital converter and associated ca

1996-09-11

1998-06-23

Young, Brian K.

Coded data generation or conversion

Converter compensation

341120, H03M 106

Patent

active

057710120

ABSTRACT:
An analog-to-digital converter (ADC) integrated circuit includes a subconverter stage having an amplifier with a non-ideal gain, and a reference voltage generator for generating a reference voltage for the subconverter stage. The reference voltage generator is adjustable and may include trimmable resistors for providing an adjusted or trimmed reference voltage to a second subconverter stage or second operation of the subconverter stage to compensate for a non-ideal gain of the amplifier. Complicated and difficult capacitor trimming for the amplifier is not needed; rather, a relatively simple and predictable trimming of thin film resistors in the reference voltage generator may be used to compensate for the non-ideal gain of the amplifier and improve performance. A method and apparatus for calibrating the ADC are also disclosed.

REFERENCES:
patent: 4354177 (1982-10-01), Sloane
patent: 4894656 (1990-01-01), Hwang et al.
Yh-Min Lin et al., IEEE Journal of Solid-State Circuits, "A 13-b 2.5-MHz Self-Calibrated Pipelined A/D Converter in 3-.mu.m CMOS", vol. 26, No. 4 (Apr. 1991), pp. 628-636.
Douglas A. Mercer, IEEE Journal of Solid-State Circuits, "A 14-b 2.5 MSPS Pipelined ADC with On-Chip EPROM", vol. 31, No. 3 (Jan. 1996), pp. 70-76.

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