Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – With means to prevent contact from penetrating shallow pn...
Patent
1992-11-16
1994-01-25
Mintel, William
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
With means to prevent contact from penetrating shallow pn...
257748, 257767, 257773, 257762, H01L 2348
Patent
active
052818543
ABSTRACT:
A structure formed by the method of forming a highly conductive electrical contact to a semiconductor region of an integrated circuits device is described. An opening to the semiconductor region is provided through an insulating layer. A thin first layer of aluminium having a first grain size is sputter deposited over and in the opening covering the surface of the semiconductor region. A second layer of aluminium having a second and substantially different grain size from the thin first layer of aluminium is sputter deposited thereover. The resulting aluminum structure is subjected in its normal process of manufacture to temperature cycling of greater than about 300.degree. C. whereby any formed silicon nodules are preferentially formed at the boundary of the thin first layer of aluminium and the second layer of aluminium. The second layer of aluminium may in one alternative completely fill the opening. In another alternative, a third layer has substantially the same grain size as the first aluminum. In this last alternative, the third layer will fill the opening to complete the electrical contact. The grain size is adjusted by the bias applied or not applied during the sputter deposition.
REFERENCES:
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patent: 4896204 (1990-01-01), Hirata et al.
patent: 5001541 (1991-03-01), Virkus et al.
patent: 5018001 (1991-05-01), Kondo et al.
patent: 5040048 (1991-08-01), Yasue
patent: 5175608 (1992-12-01), Nihei et al.
Chartered Semiconductor Manufacturing Pte Ltd.
Mintel William
Potter Roy
Saile George O.
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