Integrated circuit

Details Integrated circuit Integrated circuit

2002-12-18

2004-08-24

Pascal, Robert (Department: 2817)

Wave transmission lines and networks

Coupling networks

Frequency domain filters utilizing only lumped parameters

C333S172000, C333S175000

Reexamination Certificate

active

06781482

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an integrated circuit. Such an integrated circuit may, for example, contain an inductor/capacitor (LC) circuit forming part of a tuning arrangement for a radio frequency tuner. For instance, such an LC circuit may be provided in the “tank circuit” of a radio frequency (RF) voltage controlled oscillator (VCO) forming a local oscillator of a frequency changer or in an RF LC filter network where it is desirable to achieve a high Q.
BACKGROUND
A known type of integrated circuit VCO LC resonator uses one or more variable capacitance (varactor) diodes to allow the VCO to be tuned over a range of frequencies. However, because the inductive and capacitive components of such an integrated resonator have very wide manufacturing tolerances and because a typical VCO is required to have a relatively wide tuning range, such varactors are required to provide a relatively large capacitance change from their minimum capacitance to their maximum capacitance. As a result, the Q of such LC resonators is limited by varactor diode parasitic resistance. Also, such arrangements have a relatively poor noise performance because of the inherently non-linear varactor diode characteristics which permit noise frequency translation. Further, such VCOs are very sensitive to their frequency control inputs because of the requirement to be able to tune the VCO over a wide frequency range.
FIG. 1
of the accompanying drawings illustrates the physical design, equivalent circuit and circuit symbol of a known type of integrated RF capacitor. The capacitor is formed on a monolithic integrated circuit silicon substrate
1
, from which it is isolated by the known type of metalisation dielectric layer
2
. The capacitor comprises a “lowest” metal plate
3
and a “highest” metal plate
4
separated from each other by another metalisation dielectric layer
5
. The capacitor is covered by a known type of passivation layer
6
, which covers the whole integrated circuit. The resulting capacitor
10
is shown connected to terminals T
1
and T
2
, between which it exhibits its intended capacitance within manufacturing tolerances. However, the lowest metal plate
3
also exhibits parasitic resistance and capacitance because of its proximity to the silicon substrate
1
. These are illustrated in the equivalent circuit in
FIG. 1
as the capacitance Cox between the lowest metal plate
3
and the substrate
1
and by the resistance Rsub and the capacitance Csub of the substrate
1
. Thus, if the lowest metal plate carries an RF signal voltage, energy is transferred to the “lossy” silicon substrate
1
and this can result in a degraded noise performance in known types of VCO circuits.
FIG. 2
of the accompany drawings illustrates a known type of LC tuned circuit using capacitors
10
a
and
10
b
of the type shown in FIG.
1
. The tuned circuit forms a resonator of a tank circuit of a VCO and has a terminal “Tank” for connection to the VCO and a virtual ground terminal Vgnd. The capacitor
10
a
is connected in parallel with the inductor
11
between the terminals Tank and Vgnd to form a parallel resonant circuit. The capacitor
10
b
is connected in series with a control circuit element
12
across the inductor
11
and the capacitor
10
a
. The control circuit element
12
has a “Control” terminal for controlling the operation of the element. For example, the element
12
may comprise a field effect transistor whose source-drain path is connected in series with the capacitor
10
b
and whose gate terminal comprises the control input. The transistor thus acts as electronic switch to allow the capacitor
10
b
to be selectively connected in parallel with the inductor
11
and the capacitor
10
a
so as to provide a switched-tuned circuit which can be selected to have either of two resonant frequencies. Alternatively, the element
12
may comprise a variable capacitance device such as a varactor to provide continuous tuning of the resonant frequency.
When the control circuit element
12
is in anything other than a relatively low impedance state, a signal voltage is present on the lowest plate of the capacitor
10
b
and, as illustrated in
FIG. 1
, this results in parasitic energy losses because of the coupling to the substrate
1
.
The term “virtual ground node” as used herein is defined to mean an electrical node in a circuit designed to remain at a substantially constant voltage. Such a virtual ground node may, for example, be a node in the circuit where differential signals balance, a power supply line, or a voltage bias node. A virtual ground node includes an actual ground node which is connected to a circuit ground.
SUMMARY
According to the invention, there is provided an integrated circuit comprising a substrate, a frequency-selective circuit including at least one first multiplate capacitor, and a virtual ground node, the or each first multiplate capacitor comprising: a first capacitor comprising a first plate and a second plate disposed between the first plate and the substrate; and a second capacitor comprising the second plate and a third plate disposed between the second plate and the substrate, the virtual ground node being connected to the third plate.
The frequency-selective circuit may comprise an inductor.
The first and second capacitors may be electrically in series with each other.
The first and second capacitors may be connected across the inductor.
The virtual ground node may comprise a ground node.
The third plate may be insulated from the substrate.
The circuit may comprise a or a respective control element connected to the second plate of the or each first multiplate capacitor. The control element or at least one of the control elements may comprise a switch, such as a field effect transistor. As an alternative, the control element or at least one of the control elements may comprise a variable capacitance device such as a variable capacitance diode. The circuit may comprise a plurality of first multiplate capacitors and a plurality of control elements. At least one of the control elements may be arranged to provide stepped control and at least one other of the control elements may be arranged to provide substantially continuous control.
The or each control element may be connected in parallel with the second capacitor.
The circuit may comprise at least one second multiplate capacitor, the or each of which comprises: a third capacitor comprising a fourth plate and a fifth plate disposed between the fourth plate and the substrate; and a fourth capacitor comprising the fifth plate and a sixth plate disposed between the fifth plate and the substrate. The or each control element may be connected between the second plate and the fifth plate of a pair or a respective pair of the first and second multiplate capacitors, respectively. The third and sixth plates may be connected together to form the virtual ground node. The circuit may comprise a further frequency-selective circuit including the third and fourth capacitors.
The circuit may comprise a fifth capacitor comprising a seventh plate connected to the first plate and an eighth plate disposed between the seventh plate and the substrate and connected to the or a further virtual ground node. The circuit may comprise a sixth capacitor comprising a ninth plate connected to the fourth plate and a tenth plate connected to the eighth plate to form the further virtual ground node.
The circuit may comprise a local oscillator having a frequency determining network including the frequency-selective circuit.
The circuit may comprise a filter including the frequency-selective circuit.
The circuit may comprise a radio frequency tuner.
It is thus possible to provide an arrangement which substantially reduces the effects of parasitic elements between capacitors and the substrate of an integrated circuit. By providing a stacked arrangement of two or more capacitors with the lowest plate connected to a virtual ground node, substantially no signal voltage appears on the lowest plate so that substrate losses can be substantially r

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