Integrated circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307213, 307216, 307221R, 307242, 307243, 307244, 357 92, H03K 1756, H03K 1908, H03K 1920, G11C 1928

Patent

active

042030420

ABSTRACT:
Four-pole circuit modules constructed in integrated injection logic (I.sup.2 L), each four-pole circuit having two signal inputs, a control input, and a signal output line. The signal output line is alternatively connected to one of the signal inputs by each of the two values of a bivalent control signal. This two-level logic can be used in multiplexers in which the four-pole circuits are successively arranged in two or more levels. A shift register composed of master-slave flipflops is obtained by connecting the signal output lines of a series of four-pole circuit modules to one of the signal input lines of the respective four-pole circuit modules and to a signal input line of the next four-pole circuit. Four-pole circuits can be arranged in a series with common control and different combinations of input signals in order to form an arithmetic member for one bit per input quantity.
The four-pole circuit module is very suitable for computer-aided design (CAD), due to the advantageous location of the connection points and that small modifications in the geometry of the modular four-pole circuit modules implicitly realize additional inversion operations. The four-pole circuit module is modified to form a comparison circuit or an EXCLUSIVE-OR generator by other modifications.

REFERENCES:
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patent: 3551900 (1970-12-01), Annis
patent: 3601631 (1971-08-01), Miller
patent: 3731073 (1973-05-01), Moylan
patent: 3855484 (1974-12-01), Essen et al.
patent: 3992703 (1976-11-01), Luisi et al.
patent: 3993918 (1976-11-01), Sinclair
patent: 4053793 (1977-10-01), Ernst et al.
patent: 4056736 (1977-11-01), Blatt
patent: 4084105 (1978-04-01), Teranishi et al.
Robbins; "MTL Exclusive OR circuit"; IBM Tech. Discl. Bull.; vol. 19, No. 6, p. 2077; 11/1976. _
Higby, Jr.; "Parity Check Circuit"; IBM Tech. Discl. Bull; vol. 1, No. 6; pp. 9-10; 4/1959. _

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