Integrated chip package having intermediate substrate with...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S777000, C257S723000, C257S728000, C257S725000, C257S778000, C257S685000, C257S737000, C257S738000, C257S712000, C257S704000, C257S710000, C257S717000, C257S720000, C257S532000, C257S528000, C257S724000

Reexamination Certificate

active

06911724

ABSTRACT:
The present integrated chip package provides a low cost package that is suitable for high density semiconductors that have high power dissipation. The integrated chip package includes at least one semiconductor chip having a first surface and a second surface. The first surface of the semiconductor chip is electrically coupled to an intermediate substrate via conductive bumps. The intermediate substrate is also electrically coupled to a package substrate via a plurality of bonding wires. The second surface of the semiconductor chip is thermally coupled to a heat sink to increase the power dissipation capacity of the integrated chip package.

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Bober et al., “Curent Trends in Flip-Chip Bonding Technique for Multichip Modules—especially Mirco-Jet Printing,” Inst. Of Microsystem Tech., Wroclaw U. of Tech., Wroclaw, Poland, Conference 2000, pp. 1-14, via iMaps.
Amkor Technology, www.amkor.com, Advanced package glossary, pp. 1-4, Mar. 2001.

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