Integrated chip diode

Active solid-state devices (e.g. – transistors – solid-state diode – With groove to define plural diodes

Reexamination Certificate

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Details

C257S622000, C257S656000, C257S698000, C257S173000, C257S774000, C257S773000

Reexamination Certificate

active

06717237

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to diode manufacturing process and more particularly to an integrated chip diode (ICD) with improved characteristics.
BACKGROUND OF THE INVENTION
A conventional diode device comprises a silicon die, two conductive metal pieces each soldered to either side of the silicon die, and two conductors each soldered to another side (i.e., opposite to the silicon die) of either conductive metal piece wherein the conductors are further connected to other electronic devices. In a conventional manufacturing process of the diode device, the silicon die is formed integrally with the conductive metal pieces first. Then, an etching process is performed on the silicon die. After that, an encapsulation process is performed on the etched silicon die to encapsulate the silicon die and the conductive metal pieces with an insulator, and finishes the production of the conventional diode device.
However, the prior art suffered from several disadvantages. For example, an epoxy or other adhesive is employed to encapsulate the etched silicon die in the conventional manufacturing process of the diode device. One drawback of epoxy or other adhesive is that its heat-resisting capability is low. Hence, a diode device incorporating the epoxy or other adhesive, either for providing a high power input current of rectification device or placed in a high temperature environment, tends to damage due to high heat. As a result, an electronic product incorporating such diode devices may not function normally, resulting in a shortening of useful life, poor quality, and maintenance difficulty of the electronic product. Moreover, a body formed by the epoxy or other adhesive inevitably occupies a predetermined space. As a result, a further reduction of size of the diode device is made impossible. Thus improvement exists.
SUMMARY OF THE INVENTION
The invention relates to an integrated chip diode (ICD), which is manufactured by utilizing a diffusion process for forming p+-type and n+-type semiconductors (or n+-type and p+-type semiconductors) each having a predetermined thickness on a top and a bottom of a semiconductor wafer respectively. A plurality of semiconductor manufacture techniques including photolithography, etching, implanting, and sintering are also employed to form a plurality of diodes on the wafer. Sides of each diode are encapsulated with glass insulator. A conductive metal layer is formed on the top of the p+-type semiconductor and the bottom of the n+-type semiconductor respectively. An insulation material is coated on a portion of surface of one of the conductive metal layers. A third conductive metal layer is formed on the glass insulator by using sintering process. As such, the other one of the conductive metal layers can be electrically connected to the insulation material on the one of the conductive metal layers via the third conductive metal layer on the glass insulator.
A primary object of the present invention is to form two independent soldered conductive terminals at the same side (either top or bottom) of each diode. As such, each soldered conductive terminal is electrically connected to each of p+-type and n+-type semiconductors. As an end, a produced diode has a characteristic of surface mount device (SMD) for directly mounting on an associated electronic circuit.
Another object of the present invention is to coat the glass insulator on a periphery of the diode by means of glass sintering in a manufacturing process for effectively improving a heat transfer characteristic, increasing an operating temperature, and greatly reducing a size of the diode.
Still another object of the present invention is to produce a diode having a characteristic of SMD without performing a subsequent encapsulation process.


REFERENCES:
patent: 3787252 (1974-01-01), Filippazzi et al.
patent: 4816421 (1989-03-01), Dynes et al.
patent: 5914527 (1999-06-01), Freeman et al.

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