Integrated cache SRAM memory having synchronous write and burst

Details Integrated cache SRAM memory having synchronous write and burst Integrated cache SRAM memory having synchronous write and burst

1990-10-24

1992-06-30

Fears, Terrell W.

Static information storage and retrieval

Addressing

36523008, 365233, G11C 700

Patent

active

051269759

ABSTRACT:
An integrated cache memory device using SRAM cells is disclosed. The integrated cache memory has synchronized write capability and burst read capability.

REFERENCES:
patent: 4926385 (1990-05-01), Fujishima et al.
Communication Update, Integrated Device Technology, Santa Clara, California, Nov. 14, 1989.
Electronic Design, article entitled "Design a Secondary Cache for Intel's 80486 Processor", by Jim Handy.
Integrated Device Technology, IDT 71XXXS Product Proposal, CMOS Cache RAM 256K Burst Counter and Self-Timed Write.
Motorola Semiconductor Technical Data, pp. 5-25 and 5-29, 16K.times.4 Bit Synchronous Static RAM with Transparent Outputs.
Article from Design, entitled "Intel's 486: a cache 22?".

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