Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2001-01-18
2003-10-21
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S109000, C438S613000, C438S617000
Reexamination Certificate
active
06635511
ABSTRACT:
BACKGROUND
The present invention relates generally to electronic test instruments and more particularly to a test probe assembly for electrically connecting a ball grid array surface mount package to an electronic measurement device.
Ball grid array (BGA) has become the package of choice in the surface mount technology arena. BGA's offer many advantages over standard fine-pitch surface mount and pin grid array technologies. These advantages include reduced placement problems since BGAs are self-centering, reduced handling issues because there are no leads to damage, lower profile and higher interconnect density. There is, however, a significant drawback with BGA technology: the lack of established BGA test accessories and procedures.
Electronic test instruments (e.g., oscilloscope, logic analyzer, emulator, etc.) are used to analyze various electrical aspects of the IC including voltage and current waveforms. Typically, a loaded printed circuit board is crowded with various electrical components, including multiple IC packages. Due to the close spacing of components on the board (i.e., high “board density”) it is often difficult to electrically connect the ICs to the test instrument. BGAs tend to exacerbate this problem since there are no “leads to access for testing purposes.
As processor packages become more dense due to electrical requirements, it has become increasingly difficult to probe these packages. With pin counts in the 600-700 range, and pin to pin spacing now at 0.050 inches or less, it has become necessary for motherboard sockets to go to BGA style packages vs. the former pin grid array (“PGA”) packages. This trend has increased the difficulty in reliably dividing and attenuating signals within the interstitial array of pins.
Also, increasing pin counts and pin densities increases the insertion force required to insert the processor into a conventional low insertion force socket. Typically, the collective insertion force required to insert a 603 pin processor is approximately 55-60 lbs. of force.
Construction of probes using BGA-PGA-Flex is exceedingly difficult due to the extremely small size of the architecture involved and the corresponding density of components. Such construction involves soldering a BGA socket to a PGA header, soldering passive components to a flexible circuit and then attaching the flexible circuit to the PGA header. One concern encountered in this process is inhibiting solder migration up the BGA socket clips during soldering of the BGA. Such migration substantially increases potential contamination of the BGA socket. Another concern is soldering the BGA without allowing the 0201 resistors to separate from the flex.
SUMMARY
The present invention creates an ordered series of soldering steps and continuity tests designed to build a BGA-PGA-Flex probe while inhibiting migration of solder during the soldering steps. The process of the invention results in a tested probe with reliable solder joints all the way through.
The method of the invention comprises the steps of soldering a BGA socket onto a PGA header, inserting a flex assembly onto the BGA-PGA assembly, placing solder preforms over the PGA pins and then reflowing the flex assembly to the BGA-PGA assembly.
REFERENCES:
patent: 6213787 (2001-04-01), Murphy
patent: 6325280 (2001-12-01), Murphy
Agilent Technologie,s Inc.
Everhart Caridad
Trumper Regan L.
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