Integrated backplane interconnection architecture

Details Integrated backplane interconnection architecture Integrated backplane interconnection architecture

1990-11-21

1992-06-16

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

370 582, 3701101, 370 859, 361413, H04Q 1104, H04J 312, H04L 708, H04L 1240

Patent

active

051226910

ABSTRACT:
A backplane, provides a physical layer level interconnection between a plurality of modules. The backplane includes a physical layer inplementation of an interconnection topology incorporated within one or more integrated circuits called interconnect chips. Incorporated on the interconnect chips are interconnect drivers and interconnect receivers for the physical layer implementation of the interconnection topology. These interconnect drivers and interconnect receivers provide point-to-point links between the physical layer implementation of the interconnection topology and the plurality of modules. Each point-to-point link may include two separate point-to-point link lines, one for an interconnect driver and one for an interconnect receiver. For the bus interconnection topology, alternately, each point-to-point link may be tri-level, including only a single point-to-point link line. The interconnection topology may be, for example, a bus topology, a ring topology or a circuit switched topology.

REFERENCES:
patent: 4697858 (1987-10-01), Balakrishnan
patent: 4875206 (1989-10-01), Nichols et al.
patent: 4899333 (1990-02-01), Roediger
patent: 4955020 (1990-09-01), Stone et al.
patent: 5051982 (1991-09-01), Brown et al.

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