Integrated amplifier arrangement

Details Integrated amplifier arrangement Integrated amplifier arrangement

1981-05-28

1985-10-15

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including differential amplifier

330252, H03F 345

Patent

active

045477442

ABSTRACT:
An integrated amplifier arrangement in which the d.c. voltage gain is suppressed, which includes two transistors arranged as a differential pair with an output between the collectors of these transistors. In order to improve the high-frequency properties of the amplifier arrangement, the collector circuit of the transistors includes two load transistors in cascade with the two transistors arranged as a differential pair, each load transistor including an impedance in its base circuit in order to obtain an inductive input impedance on the emitter side of the transistor. In order to obtain direct-current and low-frequency negative feedback for eliminating the d.c. gain, the base electrodes are cross-coupled to the collector electrodes of the load transistors.

REFERENCES:
patent: 4418321 (1983-11-01), Bohme
Choma, "Actively Peaked Broadbanded Monolithic Amplifier", IEE Proceedings, vol. 127, No. 2, Apr. 1980, pp. 61-66.

Affiliated with

Also associated with

Rating

Integrated amplifier arrangement does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated amplifier arrangement, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated amplifier arrangement will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2431969