Integral topside vacuum package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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C257S437000, C257S433000

Reexamination Certificate

active

10750580

ABSTRACT:
An integrated vacuum package having an added volume on a perimeter within the perimeter of a bonding seal between two wafers. The added volume of space may be an etching of material from the inside surface of the top wafer. This wafer may have vent holes that may be sealed to maintain a vacuum within the volume between the two wafers after the pump out of gas and air. The inside surface of the top wafer may have an anti-reflective pattern. Also, an anti-reflective pattern may be on the outside surface of the top wafer. The seal between the two wafers may be ring-like and have a spacer material. Also, it may have a malleable material such as solder to compensate for any flatness variation between the two facing surfaces of the wafers.

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patent: 2003/0111441 (2003-06-01), Jerominek et al.
patent: 2000337959 (2001-04-01), None
Motamedi et al., “Antireflection Surfaces in Silicon Using Binary Optics Technology,” Applied Optics, vol. 31, No. 2, pp. 4371-4376, Aug. 1, 2002.

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