Integral topside vacuum package

Details Integral topside vacuum package Integral topside vacuum package

2011-01-25

2011-01-25

Nguyen, Thinh T (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S737000, C257S703000, C257S704000

Reexamination Certificate

active

07875944

ABSTRACT:
An integrated vacuum package having an added volume on a perimeter within the perimeter of a bonding seal between two wafers. The added volume of space may be an etching of material from the inside surface of the top wafer. This wafer may have vent holes that may be sealed to maintain a vacuum within the volume between the two wafers after the pump out of gas and air. The inside surface of the top wafer may have an anti-reflective pattern. Also, an anti-reflective pattern may be on the outside surface of the top wafer. The seal between the two wafers may be ring-like and have a spacer material. Also, it may have a malleable material such as solder to compensate for any flatness variation between the two facing surfaces of the wafers.

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All Articles and Foreign Patents cited in Previously Filed Parent U.S. Appl. No. 10/750,850, filed Dec. 29, 2003.
Motamedi et al., “Antireflection Surfaces in Silicon Using Binary Optics Technology,” Applied Optics, vol. 31, No. 2, pp. 4371-4376, Aug. 1, 2002.

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