Integrable amplitude-locked loop including an acoustic...

Oscillators – Solid state active element oscillator – Significant distributed parameter resonator

Reexamination Certificate

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Details

C331S016000, C455S313000, C455S344000

Reexamination Certificate

active

11025598

ABSTRACT:
An amplitude-locked loop (ALL) includes: a comparator circuit having a first input, a second input and an output, said first input receiving an electric reference signal; a loop filter having an input connected to said output of said comparator circuit and having an output generating an electric control signal (Vtune); a circuit generating an electric signal to be controlled, transmitted to said second input of said comparator circuit. The circuit comprises an acoustic resonator having a BAW-type resonator having a first and second resonant frequencies and associated with a first inductive partner element for removing said second resonant frequency and with a second capacitive partner element for tuning said first resonant frequency, said at least first resonator component being adjustable via said electric control signal (Vtune).

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Koroglu, M., et al., “A 1.9Ghz Image-Reject Front-End with Automatic Tuning in a 0.15μm CMOS Technology,” in Proceedings of the IEEE Int'l. Solid State Circuits Conference, San Francisco, CA, Feb. 9-13, 2003, pp. 1-10.

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