Insulator and metallization method for VLSI devices with anisotr

Metal working – Method of mechanical manufacture – Electrical device making

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

29577C, 357 68, 156643, H01L 21283

Patent

active

044894813

ABSTRACT:
In manufacture of VLSI semiconductor devices, the insulator surface upon which a metallization pattern is deposited must be smooth to facilitate lithographic operations. This requires the insulator to be thick and flowed or otherwise treated to eliminate steep edges. A contact hole etched in a thick insulator has steep sidewalls, however, and so chemical vapor deposition is preferrably used for the metallization so the sidewalls will be coated. A thin insulator coating is deposited after the contact holes are etched and prior to metallization to cover the low-resistance flowed insulator and self-align the contacts.

REFERENCES:
patent: 4327477 (1982-05-01), Yaron et al.
Tsang, P. J., "Method of Forming Poly-Si Pattern with Tapered Edge", in IBM-T.D.B., vol. 19, No. 6, Nov. 1976, pp. 2047-2048.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Insulator and metallization method for VLSI devices with anisotr does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Insulator and metallization method for VLSI devices with anisotr, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Insulator and metallization method for VLSI devices with anisotr will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1146278

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.