Insulating device for a system on chip (SOC)

Details Insulating device for a system on chip (SOC) Insulating device for a system on chip (SOC)

2005-11-08

2005-11-08

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S333000, C326S080000

Reexamination Certificate

active

06963231

ABSTRACT:
An insulating device for system on chip (SOC). The SOC has a first circuit region powered by a main power source and a second circuit region powered by a real-time power source. In the insulating device, a selector designates the main power source or a battery source as a real-time power source. A level detector detects a voltage level of the main power source and outputs a resulting signal. A NAND gate produces a logic output according to the result signal and an output signal of the first circuit. The NAND gate includes first and second PMOS transistors and first and second NMOS transistors. Gates of the first PMOS transistor and the first NMOS transistor are directly connected to the output signal of the first circuit without through any buffers. Gates of the second PMOS transistor and the second NMOS transistor are directly connected to the result signal without any buffers.

REFERENCES:
patent: 5828231 (1998-10-01), Bazargan
patent: 6593775 (2003-07-01), Yu et al.

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