Insulated-gate type integrated circuit

Details Insulated-gate type integrated circuit Insulated-gate type integrated circuit

1991-02-07

1992-06-23

Wojciechowicz, Edward J.

357 238, 357 42, 357 53, 357 55, H01L 2910, H01L 2978

Patent

active

051247631

ABSTRACT:
A P-well region is provided in a semiconductor substrate of N-type. A P-channel MOSFET is arranged in the N-type substrate while an N-channel MOSFET is arranged in the P-well region. The drain regions of the respective MOSFETs consist of high concentration impurity diffused regions and low concentration impurity diffused regions arranged about the respective high concentration impurity diffused regions. Also, a drain electrode is provided to cover the entire of the high and low concentration impurity diffused regions.

REFERENCES:
patent: 4937645 (1990-06-01), Ootsuka et al.

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