Insulated-gate transistor signal input device

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control

Reexamination Certificate

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Details

C327S312000, C327S314000, C327S318000

Reexamination Certificate

active

06333661

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to an insulated-gate transistor signal input device formed on an insulating substrate such as an array substrate incorporated in a liquid-crystal display device.
A typical active matrix liquid-crystal display device includes an array substrate in which pixel electrodes are arrayed in a matrix form, a counter substrate in which a counter electrode is formed to face the pixel electrodes, and a liquid-crystal layer held between the array substrate and counter substrate. The pixel electrodes are connected to a liquid-crystal driving circuit placed outside the array substrate, via the switching elements which are formed on the array substrate together with the pixel electrodes.
The switching element is constituted by an insulated-gate transistor such as a thin-film transistor (TFT) which has an insulated gate and a semiconductor layer formed on the array substrate. In recent years, there is a case where the liquid-crystal driving circuit is formed on the array substrate. In this case, the liquid-crystal driving circuit is formed as an insulated-gate transistor circuit constituted by a group of thin-film transistors having the same structure as that of the switching element.
When the array substrate has been electrostatically charged in the process of manufacturing the liquid-crystal display device, the insulated-gate transistor tends to be damaged or destroyed due to a surge voltage applied thereto according to the electrostatic charge.
For example, Jpn. Pat. Appln. KOKAI Publication No. 6-51346 and Jpn. Pat. Appln. KOKAI Publication No. 9-80471 disclose a protection diode circuit disposed near an Outer Lead-Bonding (OLB) pad to protect insulated-gate transistors from destruction caused by electrostatic charge applied from the OLB pad.
FIG. 1
shows a conventional liquid-crystal driving circuit in which the protection diode circuit disposed near an OLB pad for inputting a clock signal. In the liquid-crystal driving circuit, the clock signal is supplied from an OLB pad
41
through a clock line LlN to a clock buffer
42
, and then from the clock buffer
42
through a clock line L
2
N to a driver section DR. The clock buffer
42
has a series of inverters
41
-
1
,
42
-
2
, . . . ,
42
-n each constituted by p- and n-channel thin-film transistors, and performs a process of driving, in response to the clock signal, the total load capacitance of the clock line extending into the driver section DR.
A protection diode circuit DiN is constituted by a pair of p-channel thin-film transistors Tr
1
and Tr
2
whose current paths are connected in series between a power source line VDD and the clock line L
1
N and a pair of n-channel thin-film transistors Tr
3
and Tr
4
whose current paths are connected in series between a ground line GND and the clock line L
1
N. Each of the thin-film transistors Tr
1
, Tr
2
, Tr
3
and Tr
4
has a gate electrode connected to an end of the current path and constitute a diode reverse-biased by the power source voltage.
With the liquid-crystal driving circuit, the protection diode circuit D
1
N removes electrostatic charge applied from the OLB pad
41
. Specifically, when the thin-film transistors Tr
1
and Tr
2
or thin-film transistors Tr
3
and Tr
4
are forward-biased by the electrostatic charge, they are turned on to remove the electrostatic charge to the power source line VDD or ground line GND. However, the clock line L
2
N is electrically separated from the clock line L
1
N by the gate insulating films of the thin-film transistors of the clock buffer
42
, the protection diode circuit D
1
N cannot remove electrostatic charge applied to the clock line L
2
N. As a result, a thin-film transistor of the clock buffer
42
connected to the clock line L
2
N is damaged by the electrostatic charge. In this case, not only the reliability of the liquid-crystal driving circuit but also that of the liquid-crystal display device is impaired seriously. Furthermore, when the thin-film transistor of the clock buffer
42
is destroyed electrostatically, this leads to a decrease in the yield of the liquid-crystal display device.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide an insulated-gate transistor signal input device which is reliably protected from electrostatic destruction.
The object is attained by an insulated-gate transistor signal input device which comprises an insulating substrate, a first wiring section formed on the insulating substrate to receive a signal externally supplied, an insulated-gate transistor signal processing circuit formed on the insulating substrate to process the signal supplied from the first wiring section, a second wiring section formed on the insulating substrate to input a signal obtained from the insulated-gate transistor signal processing circuit to a load circuit formed on the insulating substrate, a first protection diode circuit connected to the first wiring section to remove electrostatic charge from the first wiring section, and a second protection diode circuit connected to the second wiring section to remove electrostatic charge from the second wiring section.
With the insulated-gate transistor signal input device, electrostatic charge externally applied is removed by the first protection diode circuit, and electrostatic charge accumulated in and applied from the load circuit is removed by the second protection diode circuit. As a result, the insulated-gate transistor signal processing circuit is reliably protected from electrostatic destruction.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.


REFERENCES:
patent: 4066918 (1978-01-01), Heuner et al.
patent: 4078200 (1978-03-01), Ritchie et al.
patent: 5574395 (1996-11-01), Kusakabe
patent: 5640189 (1997-06-01), Ohno et al.
patent: 5774100 (1998-06-01), Aoki et al.
patent: 6078205 (2000-06-01), Ohsawa et al.
patent: 5-307191 (1993-11-01), None
patent: 9-80471 (1997-03-01), None

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