Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – Combined with field effect transistor
Reexamination Certificate
1998-06-23
2001-05-22
Tran, Minh Loan (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Regenerative type switching device
Combined with field effect transistor
C257S137000, C257S147000, C257S152000, C257S153000
Reexamination Certificate
active
06236069
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an insulated-gate thyristor which has improved turn-off efficiency.
2. Description of the Related Art
Various types of insulated-gate thyristors have been developed which are designed to reduce the power consumption at their gates.
B. Jayant Valiga,
The MOS
-
Gated Emitter Switched Thyristor,
IEEE Electron Device Letters, Vol. 11, No. 2, February 1990, pp. 75-77 discloses an insulated-gate thyristor of such a type. This thyristor is of pnpn structure (i.e., a 4-layered structure), having a p-type anode layer, an n-type base layer, a p-type base layer, and an n-type emitter layer. The thyristor further comprises an n-type source layer, a high-impurity p-type layer, a gate electrode, a cathode, and an anode.
The n-type source layer is formed in the p-type base layer, adjacent to the n-type emitter layer. It functions as emitter of a parasitic thyristor. To prevent the latch-up of the parasitic thyristor, the high-impurity p-type layer is formed, contacting the n-type source layer. The gate electrode is formed on an insulating film, which in turn is formed on the p-type base layer interposed between the n-type emitter layer and the n-type source layer. The cathode is arranged, contacting both the n-type source layer and the high-impurity p-type layer, not contacting the n-type emitter layer. The anode is formed on the p-type emitter layer.
This insulated-gate thyristor is turned on and off by changing the voltage applied to the gate electrode, thereby turning on and off the channel extending between the n-type source layer and the n-type emitter layer.
Since the p-type base layer is electrically connected to the cathode by the high-impurity p-type layer, phenomenon generally known as “cathode shortcircuit” takes place. Due to the cathode short-circuit, the thyristor has low electron-injection efficiency. Consequently, the on-voltage of the thyristor becomes to be high.
The pnpn structure comprised of the p-type emitter layer, the n-type base layer, the p-type base layer and the n-type source layer, constitutes a parasitic thyristor, whereas the npn structure comprised of the n-type emitter layer, the p-type base layer and the n-type source layer constitutes a parasitic bipolar transistor. Once these parasitic elements start operating, it is no longer possible to control the gate electrode correctly. Inevitably, the turn-off efficiency of the insulated-gate thyristor is very low.
An insulated-gate thyristor of another type is disclosed in H. R. Chang, et al.,
MOS Trench Gate Field
-
Controlled Thyristor,
IEDM 89, pp. 293-295, 1989. This insulated-gate thyristor has a buried insulated gate, and is a kind of a so-called “static induction (SI) thyristor.”
This thyristor comprises an n-type base layer and a p-type anode (drain) layer formed on one major surface of the n-type base layer. A pair of grooves are formed in the other major surface of the n-type base layer and spaced apart from each other, by a predetermined distance. An insulated gate is formed in these grooves. That part of the n-type base layer which extends between the grooves is the channel region of the thyristor. An n-type cathode (source) layer is formed on the channel region. A high-impurity p-type well layer for releasing holes is formed in that part of the n-type base layer which is outside of one of the grooves. A cathode is located, contacting both an n-type emitter layer and the high-impurity p-type well layer. An anode is formed on the p-type anode layer.
This thyristor is a normally-on type one, which remains on unless or until a bias is applied to its gate electrode. To turn off this thyristor, a voltage which is negative with respect to the cathode is applied to the gate electrode. A hole-accumulating layer is thereby formed, extending along the gate electrode. Hence, holes are released from the n-type base layer to the cathode through this hole-accumulating layer and p-type well layer. The hole-releasing part form a pnp transistor. Then, that part of the n-type base layer which extends between the grooves is depleted, and electrons stop moving from the n-type cathode layer into said part of the n-type base layer.
Also disclosed in H. R. Chang, et al.,
MOS Trench Gate Field
-
Controlled Thyristor,
IEDM 89, pp. 293-295, 1989, is an insulated-gate SI thyristor of still another type. This thyristor is expanded three-dimensionally. In other words, diode regions, which collectively function as a current path when turned on, comprise each a stripe-shaped anode region and a stripe-shaped gate region. A carrier-releasing transistor region is located at one end of the diode regions.
The SI thyristor further comprises a bipolar transistor region for releasing carriers when the thyristor is turned off. The bipolar transistor region, serving as a parasitic transistor, is located parallel to the diode regions. This bipolar transistor remains on when the SI thyristor is on, and its base accumulates carriers. Hence, it takes a long time to release the carriers when the SI transistor is turned off. It is only either electrons or holes that the insulated gate controls when the thyristor is turned off. This is another reason why it takes a long time to release the carriers when the thyristor is turned off. Consequently, the turn-off efficiency of this insulated-gate SI thyristor is low.
Moreover, since this SI thyristor is also a normally-on type one, it remains on if no gate bias can be applied by some cause or another. It is disadvantageous from a fail-safe point of view.
As has been described, the conventional insulated-gate thyristors have but a low turn-off efficiency. In other words, it is difficult to turn off them at a sufficiently high speed, in particular while maintaining their good on-state characteristics.
Victor A. K. Temple,
MOS
-
Controlled Thyristor—A New Class of Power Device,
IEEE Transaction on Electron Devices, Vol. ED-33, No. 10, October 1989, pp. 1609-1618, discloses a so-called MCT (MOS-Controlled Thyristor). This MCT, which is a turn-off thyristor, has an n-type emitter in which a high-impurity p-type layer is formed, extending along the edge of an n-type emitter layer. That surface region of the n-type emitter layer which is located outside the p-type layer is used as turn-off channel region. That surface region of the p-type base layer which is located outside this turn-off channel region is used as turn-on channel region. A gate electrode common to both channel regions is formed on an insulating film which is formed on the turn-on and turn-off channel regions. In practice, a great number of MCTs of this type are arranged on a semiconductor pellet, in substantially uniform distribution.
This turn-off thyristor is advantageous in that a single gate electrode achieves both turn-on operation and turn-off operation. However, the threshold voltage of the turn-off channel region is higher than that of the turn-on channel region. This is because the turn-on channel region is formed in the p-type base layer, and the turn-off channel region is formed in the n-type emitter layer formed in the p-type base region by diffusing impurity into the p-type base region. Hence, the thyristor can hardly has a sufficiently high turnoff efficiency.
In the MCT, the current which flows through turn-off channel when the thyristor is turned off depends on the voltage applied to the gate electrode and the resistance of the channel. The dig/dt-controlling margin is narrower than that for current-controlled elements; it is determined by the design parameters of the MCT. Because of the narrow dig/dt-controlling margin, the maximum turn-off current cannot be sufficiently large, inevitably increasing the turn-off loss of power.
As has been pointed out, the conventional insulated-gate turn-off thyristor has a turn-off channel region whose threshold voltage is high, and inevitably has an insufficient maximum turn-off current, resulting in a great turn-off loss of power.
SUMMARY OF THE INVENTION
The first object of the present invention is
Kitagawa Mitsuhiko
Nakagawa Akio
Nakayama Kazuya
Omura Ichiro
Shinohe Takashi
Hu Shouxiang
Kabushiki Kaisha Toshiba
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Tran Minh Loan
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