Insulated-gate semiconductor device with low on-resistance

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357 38, 357 86, H01L 2978

Patent

active

047439521

ABSTRACT:
An insulated-gate semiconductor device includes an IGFET with channel, base, drift and drain regions, and further includes source and drain electrodes attached to at least the base region and to the drain region, repectively. The device further includes a carrier injection region which adjoins the IGFET drift region and forms a P-N junction therewith. Biasing structure connected to the carrier injection region and effective during the on-state of the device is provided for forward biasing the P-N junction by an amount sufficient to induce injection of carriers from the carrier injection region, across the P-N junction, and into the IGFET drift region. As a consequence, the on-resistance of the device is markedly reduced.

REFERENCES:
patent: 3999207 (1976-12-01), Arai
patent: 4345265 (1982-08-01), Blanchard
patent: 4364073 (1982-12-01), Becke et al.
patent: 4455565 (1984-06-01), Goodman et al.
patent: 4523111 (1985-06-01), Baliga
patent: 4543596 (1985-09-01), Strack et al.
patent: 4630084 (1986-12-01), Tihanyi
patent: 4641163 (1987-02-01), Tihanyi
R. S. Miller & T. I. Kamins, Device Electronics for Integrated Circuits, New York: John Wiley & Sons, (1979), pp. 105, 111 and 112.
B. J. Baliga, "Bipolar Operation of Power Junction Field-Effect Transistors", Electronics Letters, vol. 16, (Apr. 1980), pp. 300-301.

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