Insulated gate semiconductor device with extra short grid and me

Details Insulated gate semiconductor device with extra short grid and me Insulated gate semiconductor device with extra short grid and me

1987-03-12

1989-04-11

Clawson, Joseph E.

357 20, 357 22, 357 38, 357 43, 357 86, H01L 2978

Patent

active

048210951

ABSTRACT:
An improved insulated gate semiconductor device is provided with an extra short grid region of one type conductivity disposed proximate the PN junction between the first and second regions of the device. The extra short grid region provides an alternate path for one type conductivity carriers to inhibit forward biasing of the PN junction between the first and second electrodes. In addition, the grid allows opposite type conductivity carriers to flow therethrough. A portion of the grid is spaced and separated from the first region. Accordingly, a device fabricated in accordance with the present invention is less susceptible to latching and exhibits a higher voltage latching threshold.

REFERENCES:
patent: 3465216 (1969-09-01), Teszner
patent: 3831187 (1974-08-01), Neilson
patent: 4275408 (1981-06-01), Yokimoto
patent: 4466175 (1984-08-01), Coe
patent: 4466176 (1984-08-01), Temple
patent: 4503598 (1985-03-01), Vora et al.
patent: 4587713 (1986-05-01), Goodman et al.
patent: 4680604 (1987-07-01), Nakagawa et al.
patent: 4717940 (1988-01-01), Shinohe et al.

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