Insulated gate semiconductor device and method of fabricating sa

Details Insulated gate semiconductor device and method of fabricating sa Insulated gate semiconductor device and method of fabricating sa

1993-03-08

1994-06-14

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Conductivity modulation device

257139, 257147, 257328, 257341, 257378, H01L 2900

Patent

active

053212819

ABSTRACT:
An improved insulated gate semiconductor device comprises a high-concentration p-type semiconductor region formed widely enough to protrude over n-type emitter regions without reaching an n-type epitaxial layer over a p-type base region only in first regions wherein the n-type emitter regions are wider than second regions as viewed from the top of the device. A gate threshold voltage V.sub.GE (th) has a relatively high level V.sub.GE (th-High) in the first regions, so that a low collector-emitter saturation voltage V.sub.CE (sat) and a low saturation current I.sub.CE (sat) are achieved. This provides for a high short-circuit tolerance as well as a high latch-up tolerance with low losses.

REFERENCES:
patent: 4816892 (1989-03-01), Temple
patent: 5047813 (1991-09-01), Harada

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