Insulated gate GTO thyristor

Details Insulated gate GTO thyristor Insulated gate GTO thyristor

1990-11-19

1993-05-11

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

With extended latchup current level

257128, 257123, 257147, 257139, H01L 2974, H01L 29747, H01L 2910

Patent

active

052104320

ABSTRACT:
According to this invention, there is disclosed an insulated gate GTO thyristor comprising a pnpn structure including a p-type emitter layer, an n-type base layer, a p-type base layer, and an n-type emitter layer. The thyristor has a first gate electrode contacting the p-type base layer and a second gate electrode formed on a channel region of the p-type base layer through a gate insulating film. An n+-type layer of the n-type emitter layer immediately below a cathode electrode and an n--type layer of the n-type emitter layer contacting the channel region are formed in different manufacturing steps, and an emitter breakdown voltage and the threshold voltage of the second gate electrode are optimally set.

REFERENCES:
patent: 4604638 (1986-08-01), Matsuda
patent: 4684413 (1987-08-01), Goodman et al.
patent: 4717940 (1988-01-01), Shirohe et al.
patent: 4866315 (1989-09-01), Ogura et al.
patent: 4954869 (1990-09-01), Bauer
patent: 4959703 (1990-09-01), Ogura et al.
patent: 4969028 (1990-11-01), Baliga
IEEE Transactions on Electron Devices, vol. ED-32, No. 3, Mar. 1985, S. Hachad et al. "Latchup Criteria in Isulated Gate p-n-p-n Structures".

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