Insulated-gate field-effect transistor with self-aligned contact

Details Insulated-gate field-effect transistor with self-aligned contact Insulated-gate field-effect transistor with self-aligned contact

1978-04-06

1979-09-25

Wojciechowicz, Edward J.

357 52, 357 54, 357 55, 357 59, H01L 2978

Patent

active

041692705

ABSTRACT:
An oxide dielectric layer is interposed between the polysilicon gate and the contact hole to the source or drain of an insulated-gate field-effect transistor to prevent electrical shorts between the gate and metal contact to the source or drain. The oxide dielectric layer enables the contact hole to be extremely close to the polysilicon gate without electrical shorts occurring therebetween, thereby eliminating the need for a minimum separation between the gate and contact hole.

REFERENCES:
patent: 3745647 (1973-07-01), Boleky
patent: 3749987 (1973-07-01), Anantha

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