Insulated-gate field-effect transistor with self-aligned contact

Details Insulated-gate field-effect transistor with self-aligned contact Insulated-gate field-effect transistor with self-aligned contact

1976-12-09

1978-08-01

Tupman, W.

Metal working

Method of mechanical manufacture

Assembling or joining

29578, 29589, B01J 1700

Patent

active

041034155

ABSTRACT:
An oxide dielectric layer is interposed between the polysilicon gate and the contact hole to the source or drain of an insulated-gate field-effect transistor to prevent electrical shorts between the gate and metal contact to the source or drain. The oxide dielectric layer enables the contact hole to be extremely close to the polysilicon gate without electrical shorts occurring therebetween, thereby eliminating the need for a minimum separation between the gate and contact hole.

REFERENCES:
patent: 3724065 (1973-04-01), Cabajal
patent: 3913211 (1975-10-01), Seeds
patent: 3958323 (1976-05-01), Moneda

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