Insulated gate field-effect transistor comprising a mesa channel

Details Insulated gate field-effect transistor comprising a mesa channel Insulated gate field-effect transistor comprising a mesa channel

1980-09-25

1984-05-01

Larkins, William D.

357 52, 357 54, H01L 2978

Patent

active

RE0315800

ABSTRACT:
An insulated gate field-effect transistor and a method of making same, in which the channel is provided in a mesa region of a silicon body, and the channel is surrounded by thicker silicon oxide over the adjacent source and drain regions. A thinner insulating layer is over the channel, and a gate electrode on the latter. The manufacturing method involves masking the channel region while growing silicon oxide around it causing the oxide to penetrate into the silicon areas surrounding the channel to provide the channel in a mesa surrounded by the oxide.

REFERENCES:
patent: 3233186 (1966-02-01), Theriault
patent: 3344322 (1967-09-01), Dill
patent: 3475234 (1969-10-01), Kerwin et al.
patent: 3534234 (1970-10-01), Clevenger
patent: 3544399 (1970-12-01), Dill
patent: 3576478 (1971-04-01), Watkins
patent: 3707656 (1972-12-01), De Witt
patent: 3970486 (1976-07-01), Kooi

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